Timing Diagram Library
======================

A work in progress. Keep checking back for more diagrams. Feel free to request
timing diagrams you would like to see added to the library.

Each timing diagram in the library includes the python script source. You can
change the clock frequency parameter in each script to meet your design 
requirements.

.. toctree::
   :maxdepth: 1

   axi_burst_read
   pci_io_read
   pci_io_write